Design of digital applications in FPGA and ASIC technologies for space and automotive fields; Testing environment development for architecture debugging; Code porting on target devices from different families and manufacturers; Post-synthesis and post-layout simulations of implemented FPGAs and ASICs for functionality and performance validation.

Specialties: VHDL, Verilog, AHDL, MatLab; Actel Libero IDE/SoC, Xilinx ISE/Vivado, Intel/Altera Quartus, Aldec Active-HDL; Cadence SimVision, Mentor Graphics ModelSim/QuestaSim.